#include "asmarm.h"
// Generated by gcc 2.6.3 for ARM/RISCiX
rfp .req r9
sl .req r10
fp .req r11
ip .req r12
sp .req r13
lr .req r14
pc .req r15
.text
.align 0
LC0:
.word C(vacall_function)
.align 0
.global C(__vacall)
DECLARE_FUNCTION(__vacall)
C(__vacall:)
// args = 4, pretend = 0, frame = 48
// frameC(needed) = 0, current_function_anonymous_args = 0
stmfd sp!, {lr}
sub sp, sp, $48
ldr ip, [sp, $48]
str ip, [sp, $28]
str r0, [sp, $36]
str r1, [sp, $40]
str r2, [sp, $44]
str r3, [sp, $48]
mov r2, $0
str r2, [sp, $0]
add r3, sp, $36
str r3, [sp, $4]
str r2, [sp, $8]
str r2, [sp, $12]
mov r0, sp
ldr r3, [pc, $LC0 - . - 8]
mov lr, pc
ldr pc, [r3, $0]
ldr r3, [sp, $12]
cmp r3, $0
beq L3
cmp r3, $1
beq L41
cmp r3, $2
ldreqb r3, [sp, $20]
moveq r3, r3, asl $24
moveq r0, r3, asr $24
beq L3
L6:
cmp r3, $3
bne L8
L41:
ldrb r0, [sp, $20] // zeroC(extendqisi2)
b L3
L8:
cmp r3, $4
ldreq r3, [sp, $20] // movhi
moveq r3, r3, asl $16
moveq r0, r3, asr $16
beq L3
L10:
cmp r3, $5
ldreq r3, [sp, $20] // movhi
beq L42
L12:
cmp r3, $6
beq L43
cmp r3, $7
beq L43
cmp r3, $8
beq L43
cmp r3, $9
beq L43
sub r3, r3, $10
cmp r3, $1
ldrls r0, [sp, $20]
ldrls r1, [sp, $24]
bls L3
L22:
ldr r3, [sp, $12]
cmp r3, $12
ldfeqs f0, [sp, $20]
beq L3
L24:
cmp r3, $13
ldfeqd f0, [sp, $20]
beq L3
L26:
cmp r3, $14
bne L28
L43:
ldr r0, [sp, $20]
b L3
L28:
cmp r3, $15
bne L3
ldr r3, [sp, $0]
tst r3, $1
ldrne r0, [sp, $8]
bne L3
L31:
tst r3, $1024
beq L3
ldr r3, [sp, $16]
cmp r3, $1
ldreq r3, [sp, $8]
ldreqb r0, [r3, $0] // zeroC(extendqisi2)
beq L3
L34:
cmp r3, $2
bne L36
ldr r3, [sp, $8]
ldr r3, [r3, $0] // movhi
L42:
mov r3, r3, asl $16
mov r0, r3, lsr $16
b L3
L36:
cmp r3, $4
ldreq r3, [sp, $8]
ldreq r0, [r3, $0]
beq L3
L38:
cmp r3, $8
ldreq r3, [sp, $8]
ldreq r0, [r3, $0]
ldreq r1, [r3, $4]
L3:
ldr r3, [sp, $28]
str r3, [sp, $48]
add sp, sp, $48
ldmfd sp!, {pc}^